Alaspure DB, Dixit SR, Edle JS. Design and Development of Parallel Vedic Processing Architecture through ASIC Design Methodology . Int J Intell Syst Appl Eng [Internet]. 2024 Jan. 7 [cited 2025 Oct. 2];12(10s):477-86. Available from: https://www.ijisae.org/index.php/IJISAE/article/view/4396