Kumar C. A, G. R. P, G. R. P, R. A, B. P. PK, S. H, Vaishnavi D. A. L. Implementation of an Efficient and Reconfigurable Architecture for DCT on FPGA. Int J Intell Syst Appl Eng [Internet]. 2024 Jan. 7 [cited 2026 Jul. 12];12(10s):597-604. Available from: https://www.ijisae.org/index.php/IJISAE/article/view/4412