Arithmetic Adders for Approximate Computing
Keywords:
Approximate Computing, Error Resilient Applications, resource parameter analysis, Error AnalysisAbstract
When the latest research trends in approximate arithmetic circuits are reviewed, it is observed that importance has been laid out for the novelty and development of certain architectures, designs, and layouts to make them universally adaptable and applicable in real-time applications. This area has been explored deeply by discussing various existing architectures and approximation techniques in arithmetic circuits, novel architectures and techniques, and comparative test reports. There is a huge scope of work to add novel approximation techniques in arithmetic circuits like adder and multiplier for error resilient and image processing applications. To provide solutions and guidelines to the existing and novel architectures and applications, this thesis addresses the work at the circuit simulation and synthesis level of abstractions. Through simulations, this work discusses the comparative resource parameter analysis for energy-efficient applications, and error analysis for error-resilient applications while introducing a new architecture for both said applications.
Downloads
References
S. Purohit and M. Margala , "Investigating the Impact of Logic and Circuit Implementation on Full Adder Performance," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 7, pp. 1327-1331, July 2012, doi: 10.1109/TVLSI.2011.2157543
V. Vijay et al. “A Review on N-bit Ripple Carry Adder, Carry Select Adder, and Carry-Skip Adder”. Journal of VLSI Circuits and Systems,2022, vol. 4, no. 1, pp. 27-32.
Singh, Gurinder & Nidhi,. (2014). Efficient Design of Ripple Adder and Carry Skip Adder with Low Quantum Cost and Low Power Consumption. Int. Journal of Engineering Research and Applications. 4.
Hamacher, C., Vranesic, Z., Zaky, S., Manjikian, N. “Computer Organization and Embedded Systems”, 2012, (6th ed.), McGraw Hill; Standard Edition (9 January 2023); McGraw Hill Education (India).
Verma, A. K., Brisk, P., Ienne, P. “Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design”. 2008 Design, Automation and Test, Europe, 2008, pp. 1250-1255.
B. Kahng and S. Kang. “Accuracy-configurable adder for approximate arithmetic designs”. DAC Design Automation Conference 2012, San Francisco, CA, USA, 2012, pp. 820-825.
M. Shafique, W. Ahmad, R. Hafiz and J. Henkel, "A low latency generic accuracy configurable adder," 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2015, pp. 1-6, doi: 10.1145/2744769.2744778.
R. Ye, T. Wang, F. Yuan, R. Kumar and Q. Xu, "On reconfiguration-oriented approximate adder design and its application," 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2013, pp. 48-54, doi: 10.1109/ICCAD.2013.6691096.
Kyaw, K. Y., Goh, W. L., and Yeo, K. S. (2010). Low-power high-speed multiplier for error tolerant application. In 2010 IEEE International Conference of Electron Devices and SolidState Circuits (EDSSC), pages 1–4.
Zhu, N., Goh, W. L., and Yeo, K. S. (2009). An enhanced low-power high-speed adder for error-tolerant application. In Proceedings of the 2009 12th International Symposium on Integrated Circuits, pages 69–72.
R. Ye, T. Wang, F. Yuan, R. Kumar and Q. Xu, "On reconfiguration-oriented approximate adder design and its application," 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2013, pp. 48-54, doi: 10.1109/ICCAD.2013.6691096.
W. Xu, S. S. Sapatnekar, and J. Hu, “A simple yet efficient accuracy configurable adder design,” Transactions on Very Large Scale Integration (VLSI) Systems, IEEE vol. 26, no. 6, pp. 1112–1125, 2018.
O. Akbari, M. Kamal, A. Afzali-Kusha and M. Pedram, "RAP-CLA: A Reconfigurable Approximate Carry Look-Ahead Adder," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 8, pp. 1089-1093, Aug. 2018, doi: 10.1109/TCSII.2016.2633307.
Downloads
Published
How to Cite
Issue
Section
License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
All papers should be submitted electronically. All submitted manuscripts must be original work that is not under submission at another journal or under consideration for publication in another form, such as a monograph or chapter of a book. Authors of submitted papers are obligated not to submit their paper for publication elsewhere until an editorial decision is rendered on their submission. Further, authors of accepted papers are prohibited from publishing the results in other publications that appear before the paper is published in the Journal unless they receive approval for doing so from the Editor-In-Chief.
IJISAE open access articles are licensed under a Creative Commons Attribution-ShareAlike 4.0 International License. This license lets the audience to give appropriate credit, provide a link to the license, and indicate if changes were made and if they remix, transform, or build upon the material, they must distribute contributions under the same license as the original.
