Ultra-Low Latency Architectures for Secure Real-Time Payment Processing: Achieving Sub-50ms End-to-End Throughput

Authors

  • Bhulakshmi Makkena

Keywords:

Ultra-Low, Payment, Throughput, Architecture, Latency, Security, Processing, Sub-50ms

Abstract

This article discusses advanced architectures to realize low latency in the order of micro-second in secure real-time payment processing systems. As the financial services industry requires increasing throughput of sub-50ms transactions, the traditional blockchain and cloud approaches are insufficient. We consider state-of-the-art frameworks Teechan, FastPay, SecurePay and edge/serverless-based infrastructures and compare their latency, throughput, scalability and security. An experimental analysis allows us to show how architectural optimizations and hybrid technologies can be used to bring about performance breakthroughs that do not affect data integrity or regulatory compliance. Our results provide a complete reference line and indicate the future work on real-time financial systems, which can be used in the construction of the next-generation payment systems with unprecedented responsiveness and reliability.

DOI: https://doi.org/10.17762/ijisae.v12i23s.7761

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References

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Published

29.11.2024

How to Cite

Bhulakshmi Makkena. (2024). Ultra-Low Latency Architectures for Secure Real-Time Payment Processing: Achieving Sub-50ms End-to-End Throughput. International Journal of Intelligent Systems and Applications in Engineering, 12(23s), 3458 –. Retrieved from https://www.ijisae.org/index.php/IJISAE/article/view/7761

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Section

Research Article