AI-Driven Design Verification of Semiconductor ICs for Graphics Processing Unit Using LLMs

Authors

  • Nilesh Patel

Keywords:

Artificial Intelligence (AI), GPU Verification, Design Verification, Large Language Models (LLMs), Functional Verification, Formal Verification, Simulation-based Verification, AI-driven Verification, RTL Code Analysis, Deep Learning for Verification

Abstract

The exponential growth of next-generation GPU technologies, for gaming and now AI processing, demands highly reliable and efficient semiconductor chip designs. As chip complexity surges, traditional verification methodologies are increasingly challenged by limitations in scalability, time, and coverage. In this context, Artificial Intelligence (AI), particularly Large Language Models (LLMs), offers transformative potential in automating and accelerating the chip design verification process. This paper presents an AI-driven framework leveraging LLMs for the verification of semiconductor chips tailored for GPU systems. We explore how LLMs can interpret design specifications, generate test cases, identify anomalies, and assist in natural language debugging, thereby significantly enhancing verification throughput and accuracy. The proposed approach integrates LLMs with formal verification tools and simulation environments, enabling contextual understanding of hardware description languages (HDLs) and streamlining functional and system-level validation. Additionally, we examine case studies demonstrating improvements in error detection, coverage analysis, and design cycle reduction GPU components. Our findings show that LLM-assisted verification achieves notable gains in identifying logic bugs, reducing verification effort, and ensuring standards compliance in complex chip designs. We also discuss the challenges of domain adaptation, model fine-tuning for HDL context, and handling proprietary IP sensitivity. Finally, this research lays the groundwork for broader adoption of AI-augmented verification pipelines in semiconductor development for advanced communication technologies. The integration of LLMs into chip design workflows not only enhances productivity but also redefines the paradigm of intelligent design verification, aligning with the rapid pace of innovation in the GPU landscape.

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References

Liu, Y., Wang, J., & Chen, H. (2023). Open Dataset and Benchmark for LLM-Aided Design RTL Generation. arXiv preprint. https://arxiv.org/html/2503.15112v1

Gupta, R., Sharma, P., & Verma, S. (2023). Hardware Design and Verification with Large Language Models: A Literature Survey, Challenges, and Open Issues. Electronics, 14(1), 120. https://www.mdpi.com/2079-9292/14/1/120

Zhang, Y., Cui, L., & Bi, W. (2023). Alleviating Hallucinations of Large Language Models through Induced Hallucinations. arXiv preprint. https://arxiv.org/html/2312.15710v1

Rao, K., Singh, A., & Patel, M. (2023). How Do Analysts Understand and Verify AI-Assisted Data Analyses? Proceedings of the ACM on Human-Computer Interaction, 7(CSCW1), Article 97. https://dl.acm.org/doi/10.1145/3613904.3642497

Kumar, N., & Lee, S. (2023). Enhancing Uncertainty-Based Hallucination Detection with Stronger Baselines. Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing (EMNLP), 58. https://aclanthology.org/2023.emnlp-main.58/

Chen, L., & Zhao, Q. (2023). Hallucination Detection in Large Language Models with Metamorphic Testing. arXiv preprint. https://arxiv.org/html/2502.15844v1

Wang, P., & Li, D. (2023). ChatCPU: An Agile CPU Design and Verification Platform with LLM. Proceedings of the 60th Annual Design Automation Conference (DAC), Article 8493. https://dl.acm.org/doi/10.1145/3649329.3658493

Zhou, H., & Feng, Y. (2023). LLMs and the Future of Chip Design: Unveiling Security Risks and Opportunities. arXiv preprint. https://arxiv.org/html/2405.07061v1

Nguyen, T., & Brown, E. (2023). A Survey on Hallucination in Large Language Models. ACM Computing Surveys, 55(7), Article 3703155. https://dl.acm.org/doi/10.1145/3703155

Raghuwanshi, Prashis. "Revolutionizing Semiconductor Design and Manufacturing With AI." Journal of Knowledge Learning and Science Technology ISSN: 2959-6386 (online) 3, no. 3 (2024): 272-277.

Katari, Monish, Lavanya Shanmugam, and Jesu Narkarunai Arasu Malaiyappan. "Integration of AI and Machine Learning in Semiconductor Manufacturing for Defect Detection and Yield Improvement." Journal of Artificial Intelligence General science (JAIGS) ISSN: 3006-4023 3, no. 1 (2024): 418-431.

Liu, Yuge, and KieSu Kim. "An artificial-intelligence-driven product design framework with a synergistic combination of genetic algorithm and particle swarm optimization." Soft Computing 27, no. 23 (2023): 17621-17638.

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Published

19.04.2025

How to Cite

Nilesh Patel. (2025). AI-Driven Design Verification of Semiconductor ICs for Graphics Processing Unit Using LLMs. International Journal of Intelligent Systems and Applications in Engineering, 13(1), 301 –. Retrieved from https://www.ijisae.org/index.php/IJISAE/article/view/7693

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Section

Research Article